The Raptor architecture provides large FPGA resources for the high-speed line rate processing and multi-core, multi-threaded computing for C/C++ applications.
- Powerful Raptor series processing integrated into a single, low-cost multipurpose commercial server
- Leverages both Circuit Raptor and Packet Raptor firmware/software applications
- Provides demux, grooming, survey, selection, and follow-on processing in a single 1U chassis
- Supports converged signal processing (future)
- Architecture enables using multiple cores and threading to scale processing needs
- Maximizes server resource utilization while saving power, space, and maintenance costs
- Based on the Raptor PCIe accelerator card
- Supports concatenated STM-N inputs
- One or two PCIe cards can be installed per server
- Accepts one pair per PCIe card STM-16/4/1/GigE optical or electrical GigE
- State-of-the-art reprogrammable FPGA technology for demultiplexer and high-capacity selection at line rate
- Programmable architecture
- Visual LED indicators for signal input status, power, and application health
